Qualcomm Snapdragon X die shot reveals massive CPU cores with huge caches

September 29

An annotated die shot of what is claimed to be Qualcomm’s Snapdragon X processor has been posted by someone named Piglin on the Chinese Baidu platform. The image reveals massive CPU cores, a moderate-size GPU, and huge caches. Unfortunately, the die shot does not reveal the 45 TOPS neural processing unit (NPU), the part Qualcomm credited as the main selling point of this system-on-chip.

The leaker of the die shot suggests that the 12-core Snapdragon X Elite has a die size of 169.6 mm^2. That’s a little bigger than Apple’s 10-core M4, which is 165.9 mm^2. Yet, it should be noted that Qualcomm’s Snapdragon X Elite is made on TSMC’s N4P process technology (a 4nm-class node), whereas Apple’s M4 (see its die shot below) is produced using TSMC’s N3E (a 3nm-class process) manufacturing technology.

Qualcomm Snapdragon X die shot — (Image credit: Piglin/Baidu)

The main thing that strikes the eye with the Snapdragon X are its massive general-purpose Oryon CPU cores (codenamed Phoenix and originally developed by Nuvia for its datacenter-grade processors) that operate at up to 3.80 GHz. According to the leaker, each Oryon core is around 2.55 mm^2, which makes them significantly bigger than typical Arm CPU cores. Yet, Apple’s high-performance general-purpose CPU cores used in the M4 are around 3 mm^2 large, and given the process technology difference, it is clear that Apple’s fourth-gen high-performance Arm cores are more complex than Oryon.

The CPU domain takes 48.2 mm^2 of space, which is two times larger compared to the Adreno X1 GPU domain, which is 24.3 mm^2. Given that the GPU is relatively small, it is not surprising that it does not really offer high performance. Qualcomm says that the GPU features around 4.6 FP32 TFLOPS of raw performance, which is just a bit below the 4.8 FP32 TFLOPS of Nvidia’s GeForce RTX 3050, which is not bad at all.

Another thing that strikes the eye are the massive caches: the Snapdragon X Elite processor has three quad-core CPU clusters featuring 12MB 12-way L2 cache each, a 6MB system-level cache, and then the GPU has its own circa 12MB cache (spread over multiple levels). In total, the CPU has 54MB of various caches that take about 15 mm^2 of die size.

The processor also has a 128-bit LPDDR5X-8448 memory interface, an NPU, a display controller, an ISP, and various special-purpose components that are not annotated on the image.